Ciu - Altera Cyclone V Device Handbook

11-14

CIU

• Issue a reset to the controller through the reset manager.
• Issue a program controller reset by writing to the controller reset bit (controller_reset) of the
ctrl register.
CIU
The CIU interfaces with the BIU and SD/MMC cards or devices. The host processor writes command
parameters to the SD/MMC controller's BIU control registers and these parameters are then passed to the
CIU. Depending on control register values, the CIU generates SD/MMC command and data traffic on the
card bus according to the SD/MMC protocol. The control register values also decide whether the command
and data traffic is directed to the CE-ATA card, and the SD/MMC controller controls the command and
data path accordingly.
The following list describes the CIU operation restrictions:
• After a command is issued, the CIU accepts another command only to check read status or to stop the
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transfer.
• Only one data transfer command can be issued at a time.
• During an open-ended card write operation, if the card clock is stopped because the FIFO buffer is empty,
the software must first fill the data into the FIFO buffer and start the card clock. It can then issue only
an SD/SDIO STOP_TRANSMISSION (CMD12) command to the card.
• During an SDIO/COMBO card transfer, if the card function is suspended and the software wants to
resume the suspended transfer, it must first reset the FIFO buffer and start the resume command as if it
were a new data transfer command.
• When issuing SD/SDIO card reset commands (GO_IDLE_STATE, GO_INACTIVE_STATE or
CMD52_reset) while a card data transfer is in progress, the software must set the stop abort command
bit (stop_abort_cmd) in the cmd register to 1 so that the controller can stop the data transfer after
issuing the card reset command.
• If the card clock is stopped because the FIFO buffer is full during a card read, the software must read at
least two FIFO buffer locations to start the card clock.
• If CE-ATA card device interrupts are enabled (the nIEN bit is set to 0 in the ATA control register), a
new RW_BLK command must not be sent to the same card device if there is a pending RW_BLK command
in progress (the RW_BLK command used in this document is the RW_MULTIPLE_BLOCK MMC
command defined by the CE-ATA specification). Only the Command Completion Signal Disable (CCSD)
command can be sent while waiting for the Command Completion Signal (CCS).
• For the same card device, a new command is allowed for reading status information, if interrupts are
disabled in the CE-ATA card (the nIEN bit is set to 1 in the ATA control register).
• Open-ended transfers are not supported for the CE-ATA card devices.
• The send_auto_stop signal is not supported (software must not set the send_auto_stop bit in
the cmd register) for CE-ATA transfers.
The CIU consists of the following primary functional blocks:
• Command path
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• Data path
• Clock control
Command Path
The command path performs the following functions:
Altera Corporation
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SD/MMC Controller
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cv_54011
2013.12.30