Estimating The Active Serial Configuration Time; Using Epcs And Epcq Devices - Altera Cyclone V Device Handbook

CV-52007
2014.01.10
Figure 7-7: Multiple Device AS Configuration When Both Devices in the Chain Receive Different Sets of
Configuration Data
EPCS or EPCQ Device
DATA
DCLK
nCS
ASDI
When a device completes configuration, its
in the chain. Configuration automatically begins for the second device in one clock cycle.

Estimating the Active Serial Configuration Time

The AS configuration time is mostly the time it takes to transfer the configuration data from an EPCS or
EPCQ device to the Cyclone V device.
Use the following equations to estimate the configuration time:
AS x1 mode
.rbf Size x (minimum
AS x4 mode
.rbf Size x (minimum
Compressing the configuration data reduces the configuration time. The amount of reduction varies depending
on your design.

Using EPCS and EPCQ Devices

EPCS devices support AS x1 mode and EPCQ devices support AS x1 and AS x4 modes.
Configuration, Design Security, and Remote System Upgrades in Cyclone V Devices
Send Feedback
Connect the pull-up resistors to
V at a 3.0- or 3.3-V power
CCPGM
supply.
V V V
CCPGM CCPGM CCPGM
10 kΩ 10 kΩ 10 kΩ
FPGA Device Master
nSTATUS
CONF_DONE
nCONFIG
nCE
GND
AS_DATA1
DCLK
nCSO
ASDO
Buffers
Connect the repeater buffers between the
FPGA master and slave device for AS_DATA1
or DATA0 and DCLK for every fourth device.
period / 1 bit per
DCLK
period / 4 bits per
DCLK
Estimating the Active Serial Configuration Time
V
CCPGM
10 kΩ
FPGA Device Slave
nSTATUS
CONF_DONE
nCONFIG
nCEO nCE
MSEL[4..0]
DATA0
CLKUSR
DCLK
pin is released low to activate the
nCEO
cycle) = estimated minimum configuration time.
DCLK
cycle) = estimated minimum configuration time.
DCLK
nCEO
You can leave the nCEO pin
unconnected or use it as a user I/O
pin when it does not feed another
device's nCE pin.
MSEL [4..0]
For the appropriate MSEL settings
based on POR delay settings, set the
slave device MSEL setting to the PS
scheme.
For more information, refer to the
MSEL pin settings.
Use the CLKUSR pin to supply the
external clock source to drive DCLK
during configuration.
pin of the next device
nCE
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