Extended Dma Parameter Registers - Analog Devices SHARC ADSP-214 Series Hardware Reference Manual

DMA Channel Registers
Table 2-5. Chain Pointer Registers (Cont'd)
Register Name
CPFIR
CPIIR
CPIFFT
CPOFFT
CPEP0–1

Extended DMA Parameter Registers

This section describes the enhanced parameter registers used for Accelera-
tor and External Port.
Base registers. These registers, shown in
the start address of the circular buffer to be transferred to/from memory
on the corresponding DMA channel.
Table 2-6. Base Registers
Register Name
IBFIR
OBFIR
IBIIR
OBIIR
IBFFT
OBFFT
EBEP0–1
Length registers. These registers, shown in
the circular buffer to be transferred to/from memory on the corresponding
DMA channel.
2-8
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Width (Bits) Description
20 Accelerator FIR
20 Accelerator IIR
21 Accelerator FFT input
20 Accelerator FFT output
21 External Port
Width (Bits) Description
19 Accelerator FIR input
19 Accelerator FIR output
19 Accelerator IIR input
19 Accelerator IIR output
19 Accelerator FFT input
19 Accelerator FFT output
28 External Port (external base)
ADSP-214xx SHARC Processor Hardware Reference
Table 2-6, base registers indicate
Table 2-7, define the length of