Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 951

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31 30
IDP3_DAT_I (29–24)
Input Data Port 3 Data Input
15
IDP1_DAT_I (17–12)
IDP0_DAT_I (11–6)
Input Data Port 0 Data Input
Figure A-62. SRU_DAT4 Register (RW)
31 30
DIR_I (29–24)
SPDIF Biphase Receiver Stream
IDP7_DAT_I (23–18)
Input Data Port 7 Data Input
15
IDP6_DAT_I (17–12)
IDP5_DAT_I (11–6)
Input Data Port 5 Data Input
Figure A-63. SRU_DAT5 Register (RW)
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
29 28 27 26 25 24
23 22
14
13
12
11 10
9
8
7
29 28 27 26 25 24
23 22
14
13
12
11 10
9
8
7
Registers Reference
21 20 19 18 17 16
6
5
4
3
2
1
0
DIT_DAT_I (5–0)
SPDIF Transmit Data
Input
21 20 19 18 17 16
IDP6_DAT_I (17–12) (con't)
Input Data Port 6 Data Input
6
5
4
3
2
1
0
IDP4_DAT_I (0–5)
Input Data Port 4 Data
Input
IDP1_DAT_I (17–12) (con't)
Input Data Port 1 Data Input
IDP2_DAT_I (23–18)
Input Data Port 2
Data Input
A-125

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