I/O Architecture Enhancements - Analog Devices SHARC ADSP-214 Series Hardware Reference Manual

Differences from Previous Processors

I/O Architecture Enhancements

The I/O processor provides much greater throughput than the
ADSP-2116x processors. This architecture incorporates two independent
DMA buses versus the previous SHARC DMA controllers:
• one peripheral DMA bus (IOD0)
• one external port DMA bus (IOD1)
This allows to operate all external port DMA accesses independently from
the peripheral buses since up to four internal memory blocks are address-
able without any bus conflicts.
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ADSP-214xx SHARC Processor Hardware Reference