Pin Buffers As Signal Input - Analog Devices SHARC ADSP-214 Series Hardware Reference Manual

Functional Description

Pin Buffers as Signal Input

When the DAI pin is to be used only as an input, connect the correspond-
ing pin buffer enable to logic low as shown in
buffer amplifier and allows an off-chip source to drive the value present on
the DAI pin and at the pin buffer output. When the pin buffer enable
( ) is cleared (= 0), the pin buffer output (
PBENxx_I
driven onto the DAI pin by an external source, and the pin buffer input
( ) is not used.
PBxx_I

Although not strictly necessary, it is recommended programming
practice to tie the pin buffer input to logic low whenever the pin
buffer enable is tied to logic low
PIN BUFFER
OUTPUT
PIN BUFFER
INPUT
(NOT USED)
INTERFACE
TO SRU
PIN BUFFER
ENABLE
(= LOW)
Figure 9-5. Pin Buffer as Input
By default, some pin buffer enables are connected to SPORT pin enable
signals that may change value. Tying the pin buffer input low decouples
the line from irrelevant signals and can make code simpler to debug. It
also ensures that no voltage is driven by the pin if a bug in your code acci-
dentally asserts the pin enable.
9-10
www.BDTIC.com/ADI
DAI_PBxx_O
PIN
DAI_PBxx_I
BUFFER
IN
PIN
ENABLE
PBENxx_I
ADSP-214xx SHARC Processor Hardware Reference
Figure 9-5. This disables the
) is the signal
PBxx_O
(Figure 9-5 and Figure
EXTERNAL DAI
OUT
9-6).
PIN BUFFER