Table of Contents
Advertisement
Features
Table 9-1. Routing Unit Specifications (Cont'd)
Feature
Total Channels
Miscellaneous I/O channels
Peripheral Channels
Local Memory
Clock Operation
Features
The DAI/DPI incorporates a set of peripherals and a very flexible routing
(connection) system permitting a large combination of signal flows. A set
of DAI/DPI-specific registers make such design, connectivity, and func-
tionality variations possible. All routing related to peripheral states for the
DAI interface is specified using DAI/DPI registers. For more information
on pin states, refer to
The DAI/DPI may be used to connect combinations of inputs to combi-
nations of outputs. This function is performed by the SRU/SRU2 via
memory-mapped control registers.
This virtual connectivity design offers a number of distinct advantages:
• Flexibility
• Increased numbers and kinds of configurations
• Connections can be made via software—no hard wiring is required
Inputs may only be connected to outputs.
9-2
www.BDTIC.com/ADI
DAI
32
10
22
No
f
/4
PCLK
"I/O Pin Buffers" on page
ADSP-214xx SHARC Processor Hardware Reference
DPI
12
9
3
No
f
/4
PCLK
9-7.
Advertisement
Chapters
Table of Contents
