Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 408

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Data Transfer
For ping-pong DMA mode, transmit and receive for all data types are
handled in the following manner.
• At the start of buffer processing, the beginning of the next buffer
becomes the beginning of the current buffer, as the
the
MLB_CNBCRx
MLB_CCBCRx
becomes the end of the current buffer, as the
MLB_CNBCRx
MLB_CCBCRx
• A current buffer start interrupt is generated (
MLB_CSCRx
updated the
and is available to accept the next buffer. Software may then pre-
pare the next buffer by writing:
• During the processing of the current buffer,
mark which quadlet of data or packet is currently being processed.
• A current buffer done interrupt is generated when the last quadlet
in the current buffer has been successfully transmitted/received.
The current buffer and the next buffer can be configured for either
multi-packet or single-packet buffering, when receiving and transmitting
asynchronous and control packet data.
• Multi-packet buffering allows the system to reduce the interrupt
load at the expense of larger DMA buffers.
• Single-packet buffering allows DMA buffer size to be reduced at
the expense of increasing the interrupt rate.
For more information, see "Programming Model" on page 8-16.
8-12
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register are loaded into the
register. Additionally, the end of the next buffer
register is loaded into the
register.
register), which informs the software that hardware has
register, cleared the local channel
MLB_CCBCRn
ADSP-214xx SHARC Processor Hardware Reference
bit field of the
BCA
bit field from the
BEA
bit field of the
BFA
bit in the
STS
,
, and
bits.
BSA
BEA
RDY
bits continue to
BCA
bits from
BSA
bit,
RDY

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