Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 762

Programming Model
Repeated Start Condition
In general, a repeated start condition is the absence of a stop condition
between two transfers initiated by the same master. The two transfers can
be of any direction type. Examples include a transmit followed by a
receive, or a receive followed by a transmit. During a repeated start
transfer, each interrupt must be serviced correctly to avoid errors. The fol-
lowing sections are intended to assist the programmer with service routine
development.
Transmit/Receive Repeated Start Sequence
Figure 21-11 illustrates a repeated start data transmit followed by a data
receive sequence.
S 7-BIT ADDRESS ACK
XMTSERV INTERRUPT
Figure 21-11. Transmit/Receive Data Repeated Start
The tasks performed at each interrupt are:
•
TWITXINT
This interrupt is generated every time the transmit FIFO has one
or two byte locations available to be written. To service this inter-
rupt, write a byte or word into the transmit FIFO registers (
or
TXTWI16)
time), do the following:
21-24
www.BDTIC.com/ADI
8-BIT DATA ACK
MCOMP INTERRUPT
interrupt
. During one of these interrupts (preferably the first
ADSP-214xx SHARC Processor Hardware Reference
S 7-BIT ADDRESS ACK 8-BIT DATA ACK P
RCVSERV INTERRUPT
MCOMP INTERRUPT
TXTWI8