Multiply And Accumulate (Mac) Unit - Analog Devices SHARC ADSP-214 Series Hardware Reference Manual

• A DMA bus interface for transferring data to and from the acceler-
ator. This interface is also used to preload the coefficients and Dks
at start up.
• DMA configuration registers for the transfer of input data, output
data and coefficients

Multiply and Accumulate (MAC) Unit

The MAC unit shown in
mulator unit that operates on the data and coefficient fetched from the
data and coefficient memory. The MAC can perform either 32-bit float-
ing-point or 40-bit floating-point MAC operations. 32-bit floating-point
operations generate 32-bit results and 40-bit floating-point operations
generate 40-bit results.
DATA REGISTER
Figure 6-11. IIR MAC Unit
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
FFT/FIR/IIR Hardware Modules
Figure 6-11 has a pipelined multiplier and accu-
COEFFICIENT
REGISTER
dk1 REGISTER
MULT
MULT RESULT
REGISTER
ADDER
MAC RESULT
REGISTER
dk2 REGISTER
MUX
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