Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 572

Features
Table 13-1. S/PDIF Specifications (Cont'd)
Feature
Access Type
Data Buffer
Core Data Access
DMA Data Access
DMA Channels
DMA Chaining
Boot Capable
Local Memory
Clock Operation
Features
The S/PDIF interface has the following features.
• AES3-compliant S/PDIF transmitter and receiver.
• Transmitting a biphase mark encoded signal that may contain any
number of audio channels (compressed or linear PCM) or
non-audio data.
• S/PDIF receiver managing clock recovery with separate S/PDIF
PLL or optional using external PLL circuit.
• S/PDIF receiver direct supports DTS frames of 256, 512, 1024,
2048, and 4096 (4096 frames are not supported for the
ADSP-2146x processors).
• Managing user status information and providing error-handling
capabilities in both the transmitter and receiver.
13-2
www.BDTIC.com/ADI
Transmitter
No
N/A
N/A
N/A
N/A
N/A
No
f /4
PCLK
ADSP-214xx SHARC Processor Hardware Reference
Receiver
No
N/A
N/A
N/A
N/A
N/A
No
f /4
PCLK