Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 99

The order the descriptors are fetched for scatter/gather DMA with circular
buffering enabled is shown in
Table 2-25. External Port TCBs for Scatter/Gather DMA
Address
CP[18:0]
CP[18:0] + 0x1
CP[18:0] + 0x2
CP[18:0] + 0x3
CP[18:0] + 0x4
CP[18:0] + 0x5
CP[18:0] + 0x6
CP[18:0] + 0x7
Table 2-26. External Port TCBs for Circular Scatter/Gather DMA
Address
CP[18:0]
CP[18:0] + 0x1
CP[18:0] + 0x2
CP[18:0] + 0x3
CP[18:0] + 0x4
CP[18:0] + 0x5
CP[18:0] + 0x6
CP[18:0] + 0x7
CP[18:0] + 0x8
CP[18:0] + 0x9
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
Table 2-25
Register
CPEP
TPEP
TCEP
EMEP
EIEP
ICEP
IMEP
IIEP
Register
CPEP
ELEP
EBEP
TPEP
TCEP
EMEP
EIEP
ICEP
IMEP
IIEP
I/O Processor
and Table 2-26.
2-21