Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 918

Peripheral Registers
31 30
15
IIR_DMAURCHNL (11–7)
Current Channel
IIR_DMAACDONE
All Channels Done
IIR_DMAWDONE
Processing of Current Channel Done
IIR_DMASVDK
Saving Updated Dk State in Internal
Memory
Figure A-43. IIRDMASTAT Register
Table A-55. IIRDMASTAT Register Bit Descriptions (RO)
Bits Name
0 IIR_DMACPL
1 IIR_DMACnDkLD
2 IIR_DMAPPGS
3 IIR_DMAWRBK
4 IIR_DMASVDk
5 (ROC) IIR_DMAWDONE
6 (ROC) IIR_DMAACDONE
11–7 IIR_DMACURCHNL
31–12 Reserved
A-92
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29 28 27 26 25 24 23 22
14 13 12 11 10 9 8 7
Description
Chain Pointer Loading Status.
1 = state machine in chain pointer load state
Coefficient and Dk Loading.
MAC Processing In Progress.
Writing Back Updated Index Registers.
Saving Updated Dk State in Internal Memory.
Processing of Current Channel Done. Sticky, cleared on
register read.
All Channels Done. Sticky, cleared on register read.
Current Channel. Channel that is being processed in the
TDM slot. Zero indicates the last slot.
ADSP-214xx SHARC Processor Hardware Reference
21 20 19 18 17 16
6 5 4 3 2 1 0
IIR_DMACPL
Chain Pointer Load Status
IIR_DMACNDKLD
Coefficient Loading
IIR_DMAPPGS
MAC Processing in
Process
IIR_DMAWRBK
Write Back Updated
Index Pointers