Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 195

Table of Contents

Advertisement

Table 3-13. 16-bit Address Mapping (4 Banks, Page Interleaving) (Cont'd)
SHARC Pin
DDR2_ADDR[1]
DDR2_ADDR[0]
Table 3-14
shows
(10),
= 10 (eight banks).
DDR2BC
Table 3-14. 16-bit Address Mapping (8 Banks, Bank Interleaving)
SHARC Pin
DDR2_BA2
DDR2_BA1
DDR2_BA0
DDR2_ADDR[12]
DDR2_ADDR[11]
DDR2_ADDR[10]
DDR2_ADDR[9]
DDR2_ADDR[8]
DDR2_ADDR[7]
DDR2_ADDR[6]
DDR2_ADDR[5]
DDR2_ADDR[4]
DDR2_ADDR[3]
DDR2_ADDR[2]
DDR2_ADDR[1]
DDR2_ADDR[0]
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
Column Address
Row Address
IA[0]
IA[13]
1/0
IA[12]
= 1,
DDR2ADDRMODE
Column Address
Row Address
IA[20]
IA[19]
IA[8]
IA[18]
IA[7]
IA[17]
IA[6]
IA[16]
IA[5]
IA[15]
IA[4]
IA[14]
IA[3]
IA[13]
IA[2]
IA[12]
IA[1]
IA[11]
IA[0]
IA[10]
1/0
IA[9]
Bank Address DDR2 Pin
= 100 (12),
DDR2RAW
Bank Address
IA[23]
IA[22]
IA[21]
External Port
A[1]
A[0]
= 10
DDR2CAW
DDR2 Pin
BA[2]
BA[1]
BA[0]
A[12]
A[11]
A[10]
A[9]
A[8]
A[7]
A[6]
A[5]
A[4]
A[3]
A[2]
A[1]
A[0]
3-65

Advertisement

Table of Contents
loading

Table of Contents