Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 817

Pull-Up/Pull-Down Resistors
The pin descriptions in the product specific data sheets includes recom-
mendations on how to handle pins on interfaces that are disabled or for
unused pins on interfaces that are enabled. Generally, if internal pull-ups
(PU) or pull-downs (PD) are included, the pins can be left floating. Any
pin that is output only can always be left floating.
If internal pull-ups and pull-downs are not included or disabled, pins can
normally still be floated with no functional issues for the device. However,
this may allow additional leakage current.
Although the recommendations normally indicate using external pull-up
resistors, pull-down resistors can also be used. The leakage is the same
whether pull-ups or pull-downs are used. Connections directly to power
or ground can be used only if the pins can be guaranteed to never be con-
figured as outputs.
Memory Select Pins
When the multiplexed memory selects,
pull-up resistors are automatically enabled. For example, if
are used, they require that stronger external pull-up resistors are
connected. For more details on resistor values, refer to the product specific
data sheet.
Edge-Triggered I/O
It is recommended that GPIO output pins that are used to drive an
edge-sensitive signal like an interrupt (
termination resistors to prevent glitches on the signal transitions. It is
equally important that GPIO inputs that are edge-sensitive be driven from
sources that have series termination resistors. The values for the series
resistor can be determined by simulating with the IBIS models. These
models can be found on the Analog Devices web site.
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
System Design
, are enabled as outputs, the
MS3-2
, DAI/DPI pins) have series
IRQ2-0
and
MS2 MS3
23-35