Duty Cycles ........................................................................ 7-7
Dead Time ....................................................................... 7-12
Output Enable .................................................................. 7-13
Output Polarity ................................................................. 7-13
Crossover .......................................................................... 7-14
Operation Modes ........................................................................ 7-18
Waveform Modes .................................................................. 7-18
Interrupts ................................................................................... 7-25
Debug Features ........................................................................... 7-27
Effect Latency ............................................................................. 7-27
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
Contents
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