Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 779

Multiplier and Post Divider Programming Model
There are two allowable procedures to program the VCO. The first
method is shown in
1. Set the PLL multiplier and divisor value and enable the divisor by
setting the
2. After one core clock cycle, place the PLL in bypass mode by setting
(= 1) the
bypass mode.
3. Wait in bypass mode until the PLL locks (4096
4. Take the PLL out of bypass mode by clearing (= 0) the bypass bit.
Clear the
5. Wait 15 core cycles before next activity.
The second method is:
1. Set the PLL multiplier and divisor values and place the PLL in
bypass mode by setting the
in Listing
2. Wait in the bypass mode until the PLL locks (4096
3. Take the PLL out of bypass mode by clearing the bypass bit.
4. Wait for one core clock cycle.
5. Enable the divisor by setting the
6. Wait 15 core cycles before next activity.
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
Listing 22-3.
bit.
DIVEN
bit. Clear the
PLLBP
bit while taking the PLL out of bypass mode.
DIVEN
PLLBP
22-4.
Power Management
bit while placing the PLL into
DIVEN
CLKIN
bit. The second method is shown
bit.
DIVEN
cycles).
cycles).
CLKIN
22-15