Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 365

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Figure 6-14. Biquad Processing Program Flow
Writing to Local Memory
1. Enable IIR module in
2. Wait at least 4
3. Clear the
4. Set the
IIR_DBGMODE
register.
BUGCTL
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
Core sets up control
register and initiates run
Preload all the coefficients and
initialize intermediate results
Load TCB for current channel
Process one window
of current channel
NO
All channels
done?
YES
Wait for
core intervention
PMCTL1
cycles.
CCLK
bit in the
IIR_DMAEN
,
IIR_DBGMEM
FFT/FIR/IIR Hardware Modules
Move to next
channel
register.
register.
IIRCTL1
and
bits in the
IIR_HLD
IIRDE-
6-69

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