Clocking Options; Frame Sync Options; Framed Versus Unframed Frame Syncs - Analog Devices SHARC ADSP-214 Series Hardware Reference Manual

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Operation Modes

Clocking Options

In standard serial mode, the serial ports can either accept an external serial

clock or generate it internally. The

mines the selection of these options. For internally-generated serial clocks,

Finally, programs can select whether the serial clock edge is used for sam-

pling or driving serial data and/or frame syncs. This selection is performed

This section describes the different options for frame sync in standard

serial mode.

The use of frame sync signals is optional in serial port communications.

(transmit frame sync required) bit determines whether frame sync

signals are required. Active low or active high frame syncs are selected

bit. This bit is located in the

is set (=1), a frame sync signal is required for every data word.

To allow continuous transmission from the processor, each new data word

must be loaded into the transmit buffer before the previous word is shifted

out and transmitted.

is cleared (=0), the corresponding frame sync signal is not

required. A single frame sync is required to initiate communications but it

is ignored after the first bit is transferred. Data words are then transferred

continuously in what is referred to as an unframed mode.

When DMA is enabled in a mode where frame syncs are not

required, DMA requests may be held off by chaining or may not be

serviced frequently enough to guarantee continuous unframed data

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ADSP-214xx SHARC Processor Hardware Reference

control registers.

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