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Functional Description
DAI/DPI Group Routing
Each group has a unique encoding for its associated output signals and a
set of configuration registers. For example, DAI group A is used to route
clock signals. The memory-mapped registers,
corresponding to the clock inputs of various peripherals. The values writ-
ten to these bit fields specify a signal source that is an output from another
peripheral. All of the possible encodings represent sources that are clock
signals (or at least could be clock signals in some systems).
grams the input signals that are controlled by the group A register,
. All bit fields in the SRU configuration registers correspond to
SRU_CLKx
inputs. The value written to the bit field specifies the signal source. This
value is also an output from some other component within the SRU.
The SRU is similar to a set of patch bays. Each bay routes a distinct set of
outputs to compatible inputs. These connections are implemented as a set
of memory-mapped registers with a bit field for each input. The outputs
are implemented as a set of bit encodings. Conceptually, a patch cord is
used to connect an output to an input. In the SRU, a bit pattern that is
associated with a signal output (shown in
field corresponding to a signal input.
The same encoding can be written to any number of bit fields in the same
group. It is not possible to run out of patch points for an output signal.
Just as group A routes clock signals, each of the other groups route a col-
lection of compatible signals. Group B routes serial data streams while
group C routes frame sync signals. Group D routes signals to pins so that
they may be driven off-chip. Note that all of the groups have an encoding
that allows a signal to flow from a pin output to the input being specified
by the bit field, but group D is required to route a signal to the pin input.
Group F routes signals to the pin enables, and the value of these signals
determines if a DAI pin is used as an output or an input. These groups are
described in more detail in the following sections.
9-18
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ADSP-214xx SHARC Processor Hardware Reference
, contain bit fields
SRU_CLKx
Figure 9-9
Figure
9-9) is written to a bit
dia-
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