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Data Transfer
I
2
S AND LEFT-JUSTIFIED FORMAT
24-BIT AUDIO DATA
I
2
S AND LEFT-JUSTIFIED FORMAT, 32-BIT DATA WIDTH
Figure 11-8. IDP Data Buffer Format SIP – I2S/Left-Justified (32 Bits)
The polarity of left-right encoding is independent of the serial mode frame
sync polarity selected in
page
11-3). Note that I
dictate the first (left) channel, and left-justified mode uses a
sync (left-right) signal to dictate the first (left) channel of each frame. In
either mode, the left channel has bit 3 set (= 1) and the right channel has
bit 3 cleared (= 0).
PDAP Data Buffer Format
If the PDAP module is enabled the IDP data buffer format will change
according to the PDAP packing bits (
Figure
11-9.
11-18
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VALIDITY BIT
USER DATA
CHANNEL STATUS
BIT
32 BIT DATA
for that channel
IDP_SMODE
2
S mode uses a
LOW
IDP_PDAP_CTL
ADSP-214xx SHARC Processor Hardware Reference
L/R BIT
BLOCK STATUS
BIT
(Table 11-3 on
frame sync (left-right) signal to
HIGH
register) as shown in
3 BITS
IDP CHANNEL
frame
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