Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 366

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IIR Accelerator
5. Set the
IIR_ADRINC
increment.
6. Write start address to the
ficient memory is selected.
7. Wait at least 4
8. Write data to the
9. Write data to the
Reading from Local Memory
1. Enable IIR module in
2. Wait at least 4
3. Clear the
4. Set the
IIR_DBGMODE
IIRDEBUGCTL
5. Set the
IIR_ADRINC
increment.
6. Write start address to the
ficient memory is selected.
7. Wait at least 4
8. Read data from the
9. Read data from the
6-70
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bit in
IIRDEBUGCTL
IIRDBGADDR
cycles.
CCLK
IIRDBGWRDATA_L
IIRDBGWRDATA_H
PMCTL1
cycles.
CCLK
bit in the
IIR_DMAEN
,
IIR_DBGMEM
register.
bit in the
IIRDBGADDR
cycles.
CCLK
IIRDBGRDDATA_L
IIRDBGRDDATA_H
ADSP-214xx SHARC Processor Hardware Reference
register for address auto
register. If bit 11 is set, coef-
register.
register.
register.
register.
IIRCTL1
and
bits in the
IIR_HLD
register for address auto
IIRDEBUGCTL
register. If bit 11 is set, coef-
register.
register.

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