Operating Modes; Internal Dma Addressing - Analog Devices SHARC ADSP-214 Series Hardware Reference Manual

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External Port DMA

Table 3-25. Enhanced DMA Parameter Registers (Cont'd)

Tap List Pointer

Operating Modes

This section highlights the different DMA modes which can be used with

the external port.

Besides the traditional internal to external addressing type, the DMA

module also supports internal to internal transfers. This is accomplished

by indexing all external parameter registers with internal addresses. The

DMA controller recognizes the transfer by addresses and not by an addi-

tional control bit setting.

Note that the DMA channel priority changes if using internal vs.

external index addresses.

The SHARC supports another internal to internal DMA module (MTM)

which has higher priority by default but does only support standard DMA

mode. For more information, see

www.BDTIC.com/ADI

Holds the length of the tap list (the number of taps for

delay line DMA, scatter/gather DMA).

Holds address of an array in internal memory which

holds offsets to be used when accessing delay line DMA

in external memory. The offset represents the first

address of each read block. Applies to delay line DMA,

scatter/gather DMA

Chapter 5, "Memory-to-Memory Port

ADSP-214xx SHARC Processor Hardware Reference

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