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High Frequency Design
• To allow better control of impedance and delay, and to reduce
crosstalk, design for lower transmission line impedances.
• Experiment with the board and isolate crosstalk and noise issues
from reflection issues. This can be done by driving a signal wire
from a pulse generator and studying the reflections while other
components and signals are passive.
The capacitors should be placed close to the package as shown in
Figure
23-12. The decoupling capacitors should be tied directly to the
power and ground planes with vias that touch their solder pads. Sur-
face-mount capacitors are recommended because of their lower series
inductances (ESL) and higher series resonant frequencies.
Connect the power and ground planes to the processor's power supply
pins directly with vias, do not use traces. The ground planes should not be
densely perforated with vias or traces as this reduces their effectiveness. In
addition, there should be several large tantalum capacitors on the board.
Designs can use either bypass placement case shown in
Figure
23-12, or combinations of the two. Designs should try to
minimize signal feedthroughs that perforate the ground plane.
BYPASS CAPACITORS ON NON-COMPONENT
(BOTTOM) SIDE OF BOARD, BENEATH DSP PACKAGE
Figure 23-12. Bypass Capacitor Placement
23-38
www.BDTIC.com/ADI
BYPASS CAPACITORS ON COMPONENT
(TOP) SIDE OF BOARD, AROUND DSP PACKAGE
ADSP-214xx SHARC Processor Hardware Reference
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