Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 409

Table of Contents

Advertisement

Circular Buffer DMA
Logical channels operate in circular buffer DMA mode when the channel
mode select bits in the
available for synchronous channels only. In contrast to ping-pong buffer-
ing, circular buffering uses a single, circular memory buffer to process
channel data.
For circular buffer mode, synchronous data is handled in the following
manner:
• Before buffer processing can begin, the
register and the
grammed with the beginning and the ending address of the circular
buffer. Set the
processing.
• At the start of buffer processing, the beginning address of the circu-
lar buffer (
Additionally, the ending address of the circular buffer (
loaded into the
• During the processing of the circular buffer, the
updated to indicate which quadlet of the synchronous data is cur-
rently being processed.
• Once the end of the buffer is reached and
reloaded to point to the beginning address of the circular buffer
(
).
BSA
Unlike in ping-pong DMA, the
of the circular buffer DMA. Software must clear this bit to halt buffer pro-
cessing.
For more information, see "Programming Model" on page 8-16.
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
register are set to 01. This mode is
MLB_CECRx
bits in the
BEA
bit in the
RDY
MLB_CSCRx
) is loaded into
BSA
bit field of the
BFA
bit remains set during the processing
RDY
Media Local Bus
bits in the
BSA
register should be pro-
MLB_CNBCRx
register to initiate buffer
field of the
BCA
MLB_CCBCRx
register.
MLB_CCBCRx
BCA
=
BCA
BFA
MLB_CNBCRx
register.
bits) is
BEA
bits are
, the
field is
BCA
8-13

Advertisement

Table of Contents
loading

Table of Contents