Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 644

Effect Latency
from , but their contents are identical to that of
RXSPI
is read from core, the
transfer may be initiated (if
when the shadow register is read.
core.
Internal Loopback Mode
In this mode different types of loopback are possible since there is only
one DMA channel available:
• Core receive and transmit transfers
• Transmit DMA and core receive transfers
• Core Transmit and DMA receive transfers
To loop data back from
nected. The
MOSI
should set the
SPIEN

Loopback operation is only used in master mode.
Loop Back Routing
The SPI supports an internal loop back mode using the SRU.
information, see "Loop Back Routing" on page 9-40.
Effect Latency
The total effect latency is a combination of the write effect latency (core
access) plus the peripheral effect latency (peripheral specific).
15-28
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bit is cleared (read only-to-clear) and an SPI
RXS
= 00). No such hardware action occurs
TIMOD
RXSPI_SHADOW
to
MOSI MISO
pin will contain the value being looped back. Programs
, , and
SPIMS ILPBK
ADSP-214xx SHARC Processor Hardware Reference
RXSPI
is only accessible by the
, the pin is internally discon-
MISO
bits in the
SPICTLx
. When
RXSPI
register.
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