Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 920

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Peripheral Registers
Table A-56. IIRDEBUGCTL Register Bit Descriptions (RW) (Cont'd)
Bits
Name
5
IIR_ADRINC
31–6
Reserved
Media Local Bus Registers
The registers in this section are used to program and get status informa-
tion for the MLB interface and the specific channels used.
MLB Global Registers
This section lists all different control and status registers related to the
MLB controller.
Device Control Configuration Register (MLB_DCCR)
This register, shown in
the device enable/disable, clock rate, lock status and addressing.
31 30
MDE
MLB Enable
LBM
Loopback Mode Enable
MCS (29–28)
MLB Clock Select
M5PS
MLB 5-pin Select
15
Figure A-45. MLB_DCCR Register
A-94
www.BDTIC.com/ADI
Description
Address Auto Increment. If this bit is set, the address register
auto increments on IIRDBGWRDATA_H/
IIRDBGWRDATA_L writes and IIRDBGRDDATA_H/
IIRDBGRDDATA_L reads.
Figure A-45
29 28 27 26 25 24
14
13
12
11 10
9
8
7
ADSP-214xx SHARC Processor Hardware Reference
and described in
Table
23 22
21 20 19 18 17 16
6
5
4
3
2
1
0
MDA (7–0)
MLB Device Address
A-57, controls
MRS
MLB Software Reset
MHRE
MLB Hardware Reset Enable
MLE
MLB Little-Endian Mode
MLK
MLB Lock

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