Complementary Outputs; Crossover - Analog Devices SHARC ADSP-214 Series Hardware Reference Manual

Functional Description
required, provided the change is done a few cycles before the next period
change.

Complementary Outputs

The PWM controller can be operatde in paired or non paired mode
( register).
PWMCTLx
In non paired mode (default) both outputs (high and low side) are driven
independently. Since paired mode drives the output logic of the PWM in
a complementary fashion (low side = /high side), this feature may be use-
ful in PWM bridge applications.

Crossover

The
PWMSEG3–0
for each PWM output. If crossover mode is enabled for any pair of PWM
signals, the high-side PWM signal from the timing unit (for example,
is diverted to the associated low side output of the output control unit so
that the signal ultimately appears at the
The corresponding low side output of the timing unit is also diverted to
the complementary high side output of the output control unit so that the
signal appears at the
cleared so that the crossover mode is disabled on both pairs of PWM sig-
nals. Even though crossover is considered an output control feature, dead
time insertion occurs after crossover transitions to eliminate
shoot-through safety issues.
Note that crossover mode does not work if:
1. One signal of
2. and
PWM_AL
settings from
7-14
www.BDTIC.com/ADI
registers contain two bits (
pin. Following a reset, the two crossover bits are
AH
–
PWM_AL PWM_AH
or
PWM_AH PWM_BL
registers.
PWMPOLx
ADSP-214xx SHARC Processor Hardware Reference
and
AHAL_XOVR
pin.
AL
or – is disabled.
PWM_BL PWM_BH
and have different polarity
PWM_BH
), one
BHBL_XOVR
)
AH