Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 686

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Operating Modes

DAI_PB08-01_O

*DEDICATED EXTERNAL PINS

(NOT DAI/DPI PINS)

Figure 17-1. SR Block Diagram

Operating Modes

This section describes the two operation modes used by the shift register.

Serial Data Output

The shift register outputs serial data on the

of the 18-bit stream are moved to the serial output. By default if all the

bits are cleared, the LSB data is output. This mode is for use-

ful if multiple SR registers need to be cascaded.

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SHIFT REGISTER BLOCK

ADSP-214xx SHARC Processor Hardware Reference

SHIFT REGISTER

pins based on the

SR_LDO[17-0]

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