Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 737

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3. Set up the appropriate control register to enable the UART trans-
mitter and receiver, chain pointer, and DMA (
,
UARTEN
DMA engine fetches the index, modify, count, and chain pointer
values from the memory address specified in the chain pointer reg-
ister. Once the DMA parameters are fetched, normal DMA starts.
This process is continued until the chain pointer register contains
all zeros.
Notes on Using UART DMA
The following should be noted when performing DMA through the
UART.
• DMA can be interrupted by resetting the
the other control settings should be changed. If the UART is
enabled again, then interrupted DMA can be resumed by resetting
the
UARTDEN
• Disabling the UART by resetting the enable
in the transmit/receive buffer. Resetting the UART during a DMA
operation is prohibited and leads to data loss.
• Do not disable chaining (
progress.
• During a receive DMA, a read of the receiver buffer (
not allowed. If needed, programs should read the receiver shadow
buffer (
UARTRBRSH
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
bits). Once chain pointer DMA is enabled, the
UARTCHEN
bit.
UARTCHEN
).
UART Port Controller
UARTDEN
bit, but none of
UARTDEN
bit flushes data
UARTEN
bit) when a chaining DMA is in
UARTRBR
,
) is
20-23

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