Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 270

Functional Description
to drive the first byte if
asserted again, the transmitter drives
the next word. If the transmit buffer is empty,
buffer is refilled, regardless of the state of
LXCLK
LXACK
2
LXDAT7-0
BYTE 1
Figure 4-3. Link Port Handshake Timing
The following list describes the stages shown in
1. stays high at byte 0 if
LCLK
rising edge.
LCLK
2. may deassert after byte 0.
LxACK
3. reasserts as soon as the link buffer is not full.
LACK
4. Transmitter samples
next word.
4-6
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is deasserted. When
LACKx
LCLKx
MINIMUM LACK SET-UP TIME
BYTE 2
is sampled low on the previous
LACK
high indicates a stall.
LCLK
to determine whether to transmit the
LACK
ADSP-214xx SHARC Processor Hardware Reference
is eventually
LACKx
low and begins transmission of
remains low until the
LCLKx
.
LACKx
1
4
3
BYTE 3 (32-BIT) BYTE 0 (LSBs)
5
Figure 4-3.
6