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High Frequency Design
RESETOUT
Circuit boards should have a test pad for the
used as handshake signal for booting or as clock out (
a debug aid to verify the processor is active and running.
Input Pin Hysteresis
Hysteresis (shown in
Hysteresis causes the switching point of the input inverter to be slightly
above 1.4 V (V
falling edge (V
T
The hysteresis is intended to prevent multiple triggering of signals that are
allowed to rise slowly, as might be expected for example on a reset line
with a delay implemented by an RC input circuit. Hysteresis is not used to
reduce the effect of ringing on processor input signals with fast edges,
because the amount of hysteresis that can be used on a CMOS chip is too
small to make a difference. The small amount of hysteresis allowed is due
to restrictions on the tolerance of the V
worst-case conditions.
Refer to the appropriate product data sheet for exact specifications.
V
T+
V
T
V
T-
V
IL
Figure 23-11. Input Pin Hysteresis
23-34
www.BDTIC.com/ADI
Figure
23-11) is used on all SHARC input signals.
) for a rising edge (V
T
–). The value of the hysteresis is approximately ± 100 mV.
V
IH
ENABLES VT-
ADSP-214xx SHARC Processor Hardware Reference
pin This pin can be
RESETOUT
CLKIN
+) and slightly below 1.4 V for a
T
and V
TTL input levels under
IL
IH
V
DDEXT
ENABLES VT+
frequency) for
GND
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