Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 858

ADSP-2146x External Port Registers
15
DDR2MR (15–14)
Mode Register
DDR2DTWR (11–9)
Write Recovery Time
DDR2DLLRST
DLL Reset
Figure A-11. DDR2CTL2 Register
Table A-13. DDR2CTL2 Register Bit Descriptions (RW)
Bit
2–0
3
6–4
7
8
11–9
12–13
15–14
A-32
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14 13 12 11 10 9 8 7
Name Description
DDR2BL Burst Length.
010 = BL = 4
All other settings reserved.
Reserved
DDR2CAS CAS Latency.
000 = Reserved
001 Reserved
010 2 clock cycles
...
111 7 clock cycles
Reserved
DDR2DLLRST DLL Reset.
0 = Normal
1 = Reset
DDR2TWR Write Recovery Time.
000 = Reserved
001 = 2 clock cycle
010 = 3 clock cycles
...
110 = 7 clock cycles
111 = Reserved
Reserved
DDR2MR Mode Register.
Must be set to 00.
ADSP-214xx SHARC Processor Hardware Reference
6 5 4 3 2 1 0
DDR2BL (2–0)
Burst Length
DDR2CAS (6–4)
CAS Latency