DAI Signal Routing Unit Registers
31 30
DAI_PB20_I_INVERT
DAI_PB19_I_INVERT
DAI_PB20_I (27–21)
DAI Pin Buffer 20 Input
15
DAI_PB19_I (20–14)
DAI_PB18_I (13–7)
DAI Pin Buffer 18 Input
Figure A-74. SRU_PIN4 Register (RW)
Setting
SRU_PIN4
bit 29 to high inverts the level of
SRU_PIN4
only works if the buffer output is not routed to its input.
Table A-78. Group D Sources – Pin Signal Assignments
Selection Code
0000000 (0x0)
0000001 (0x1)
0000010 (0x2)
0000011 (0x3)
0000100 (0x4)
0000101 (0x5)
0000110 (0x6)
0000111 (0x7)
0001000 (0x8)
0001001 (0x9)
0001010 (0xA)
0001011 (0xB)
0001100 (0xC)
A-134
www.BDTIC.com/ADI
29 28 27 26 25 24
23 22
14
13
12
11 10
9
8
7
bit 28 to high inverts the level of
Source Signal
DAI_PB01_O
DAI_PB02_O
DAI_PB03_O
DAI_PB04_O
DAI_PB05_O
DAI_PB06_O
DAI_PB07_O
DAI_PB08_O
DAI_PB09_O
DAI_PB10_O
DAI_PB11_O
DAI_PB12_O
DAI_PB13_O
ADSP-214xx SHARC Processor Hardware Reference
21 20 19 18 17 16
DAI_PB19_I (20–14) (con't)
DAI Pin Buffer 19 Input
6
5
4
3
2
1
0
DAI_PB17_I (6–0)
DAI Pin Buffer 17 Input
DAI_PB19_I
. Input Inversion
DAI_PB20_I
Description (Source Selection)
Pin Buffer 1
Pin Buffer 2
Pin Buffer 3
Pin Buffer 4
Pin Buffer 5
Pin Buffer 6
Pin Buffer 7
Pin Buffer 8
Pin Buffer 9
Pin Buffer 10
Pin Buffer 11
Pin Buffer 12
Pin Buffer 13
and setting
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