External Port DMA
LOGICAL ADDRESS
(GENERATED BY SEQUENCER)
ISA (NW)
OPERATION
VISA (SW)
OPERATION
Figure 3-20. Translation of Logical to Physical External
Memory Addressing
External Port DMA
The external port has two DMA channels that can use either the
SDRAM/DDR2 controller or the asynchronous memory interface (AMI).
The AMI controller supports DMA with an external data width of 8 bits.
The SDRAM/DDR2 controllers support DMA with an external data
width of 16-bits.
External Port DMA Parameter Registers
These registers are used to set up and control DMA through the proces-
sor's external port. For information on these registers and on how to set
3-100
www.BDTIC.com/ADI
0x20 0000
0x5F FFFF
0x60 0000
0xFF FFFF
ADSP-214xx SHARC Processor Hardware Reference
PHYSICAL ADDRESS (TRANSLATED
BY INTERFACE FOR X16 DEVICE)
0x40 0000
0x60 0000
0x80 0000
0xFF FFFF
0x11F FFFF