Auto-Refresh; No Operation/Command Inhibit; Command Truth Table - Analog Devices SHARC ADSP-214 Series Hardware Reference Manual

SDRAM Controller (ADSP-2147x/ADSP-2148x)

Auto-Refresh

The SDRAM internally increments the refresh address counter and causes
a CAS before RAS (CBR) refresh to occur internally for that address when
the auto-refresh command is given. The SDC generates an auto-refresh
command after the SDC refresh counter times out. The
SDRAM refresh rate control register (
addresses are refreshed within the t
timing specifications.
Before executing the auto-refresh command, the SDC executes a pre-
charge all command to all external banks. The next activate command is
not given until the t
Auto-refresh commands are also issued by the SDC as part of the
power-up sequence and after exiting self-refresh mode.

No Operation/Command Inhibit

The no operation (
tions currently in progress. The command inhibit command is the same as
a command; however, the SDRAM is not chip-selected. When the
NOP
SDC is actively accessing the SDRAM, but needs to insert additional
commands with no effect, the
not accessing any SDRAM external banks, the command inhibit com-
mand is given.

Command Truth Table

Table 3-5 provides the bit states of the SDRAM for specific SDRAM
commands. Note that an X means do not care.
3-24
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REF
specification (t
RFC
) command to the SDRAM has no effect on opera-
NOP
command is given. When the SDC is
NOP
ADSP-214xx SHARC Processor Hardware Reference
RDIV
) must be set so that all
SDRRC
period specified in the SDRAM
= t + t ) is met.
RFC RAS RP
value in the