Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 592

Programming Model
desired mode in the transmitter control register. This setup can be accom-
plished in three steps.
1. Connect the transmitter's four required input signals and one
biphase encoded output in the SRU. The four input signals are the
serial clock (
data (
DIT_DAT_I
for the encoding. The only output of the transmitter is
2. If user bits are required, write 0x1 to the
first block of transfer. Also route the
DAI_INT_26
the last frame of the block (192), allowing changes of user bits for
the next block.
3. Initialize the
4. Manually set the block start bit in the data stream once per block
(384 words). This is necessary if automatic generation of block
start information is not enabled in the
0).
Programming the Receiver
Since the S/PDIF receiver data output is not available to the core, pro-
gramming the peripheral is as simple as connecting the SRU to the
on-chip (serial ports or input data port) or off-chip (DAI pins) serial
devices that provide the clock and data to be decoded, and selecting the
desired mode in the receiver control register. This setup can be accom-
plished in two steps.
1. Connect the input signal and three output signals in the SRU for.
The only input of the receiver is the biphase encoded stream,
. The three required output signals are the serial clock
DIR_I
13-22
www.BDTIC.com/ADI
), the serial frame sync (
DIT_CLK_I
), and the high frequency clock (
( register). This generates interrupts during
DAI_IRPTLx
register to enable the data encoding.
DITCTL
ADSP-214xx SHARC Processor Hardware Reference
DIT_FS_I
DIT_HFCLK_I
register for the
DITUSRUPD
signal to the
DIT_BLK_START_O
register, (
DITCTL DIT_AUTO
), the serial
) used
.
DIT_O
=