Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 627

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DPI (SPI_CLK_O)

DPI (SPI_FLG0_O)

DPI (SPI_MOSI_O)

MASTER DEVICE

Figure 15-3. SHARC Processor as SPI Master

Multi Master Systems

The SPI does not have an acknowledgement mechanism to confirm the

receipt of data. Without a communication protocol, the SPI master has no

knowledge of whether a slave even exists. Furthermore, the SPI has no

flow control.

Slaves can be thought of as input/output devices of the master. The SPI

does not specify a particular higher-level protocol for bus mastership. In

some applications, a higher-level protocol, such as a command-response

protocol, may be necessary. Note that the master must initiate the frames

for both its' command and the slave's response.

Multi master mode allows an SPI system to transfer mastership from one

SPI device to another. In a multi device SPI configuration, several SPI

ports are connected and any one (but only one) of them can become a

master at any given time.

In this configuration, every

pin should be connected (see

are always enabled simultaneously, unless the broadcast mode has been

The master's

tem via their

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STEREO 96 kHz DAC

pin in the SPI system is connected. Like-

pin in the system is on a single node, and every

pins connect to each of the slave SPI devices in the sys-

pins. To enable the different slaves, connect the slave

Serial Peripheral Interface Ports

15-4). SPI transmission and reception

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