Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 787

• The processor core and peripherals are reset exactly as if a
Power-on (hardware) reset is asserted, except:
• The SDRAM/DDR2 controllers continue to run and
refresh as programmed.
• The contents of external SDRAM/DDR2 are unaffected,
and retain their values prior to a running reset.
• A system boot is NOT initiated. Instead, the program coun-
ter is cleared and program execution begins from the very
first location of program memory (from the reset interrupt
vector table).
Running reset allows programs to:
• Execute self-modifying code that has previously overwritten exist-
ing code in internal memory.
• Activate an external watchdog in cases where there is a malfunction
or exception within a peripheral.
• Perform a context reset of the processor sufficient to restore the
state, (in cases where a complete boot is not required).

The
RUNRSTCTL
reset, software reset, emulator reset, or by writing to the appropri-
ate bits of the
For emulation reset, see the SHARC Processor Programming Reference,
"JTAG" chapter.
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
register is reset only on assertion of a hardware
register via software.
RUNRSTCTL
System Design
23-5