Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 933

Table A-67. MLB_CECRx Register Bit Descriptions for Synchronous
Channels (RW)
Bit Name
29–28 CTYPE
30 CTRAN
31 CE
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
Description
Channel x Type Select.
00 = Synchronous (default)
01 = Reserved
10 = Asynchronous
11 = Control
Channel x Transmit Select.
0 = Receive (default)
1 = Transmit
Channel x Enable.
0 = Channel x disabled (default)
1 = Enabled
Registers Reference
A-107