Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 646

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Programming Model
Then the program can change the SPI configuration. In this case, the slave
is always selected. Data corruption can be avoided by enabling the slave
only after configuring both the master and slave devices.
Master Mode Transfers
For core or DMA transfers, when the SPI is configured as a master, the
ports should be configured and transfers started using the following steps:
1. Route all required signals (
including the
2. Before enabling the SPI port, programs should specify which of
the slave-select signals (DPI pins) to use, setting one or more of the
required SPI flag select bits (
DMA operation set
3. Set
AUTOSDS
controlled by the SPI port. (When
0 setting has automated control as with previous SHARC
processors)
4. Write to the
device as a master. Configure the
ing the appropriate word length, transfer format, baud rate, and
other necessary information.
The next steps are dependant on whether the access is a core or a DMA
access.
15-30
www.BDTIC.com/ADI
MOSI
as slave select outputs.
SPI_FLGx_O
DSxEN
= 10.
TIMOD
bit to 1, to ensure the slave-selects are automatically
register and set the
SPICTLx
ADSP-214xx SHARC Processor Hardware Reference
,
,
) for master mode
MISO
SPICLK
) in the
SPIFLGx
= 0, only the
AUTOSDS
bit to enable the
SPIMS
registers, and configur-
SPIBAUDx
register. For
=
CPHASE

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