Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 791


The
ACK
The received data streams of 4x8-bit data words are packed by the
buffer into 32-bit words least significant bit (LSB) first, and passed
through the DMA's 6 deep external port buffer
memory (Figure
Figure 23-3. External Port Data Packing
The external port DMA channel 0 (
boot kernel information to the processor. At reset, the DMA parameter
registers are initialized to the values listed in
In this configuration, the loader kernel is read via DMA from the FLASH.
If the application needs to speed-up read accesses, programs should
change the wait states (
kernel is executed, the new wait state settings are applied and processor
booting continues.
Table 23-2. AMICTL1 Boot Settings (0x5C1)
Bit
0
2–1
3
4
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
pin is disabled during external port booting.
23-3).
32 32
DATA[7:0]
bits, see
WS
Name Setting
AMIEN AMI enable (set = 1)
BW Bus width = 8-bit (00)
PKDIS Packing, 8-bit to 32-bit (cleared = 0)
MSWF Most significant word first (cleared = 0)
DFEP0
32
Internal
DMA
Memory
) is used when downloading the
DMAC0
Table 23-4.
Table 23-2) in the kernel file. After the
System Design
AMIRX
into the internal
23-9