Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 628

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Operating Modes

SPI_MOSI_PBEN_O (open drain)

SPI_MISO_PBEN_O (open drain)

Figure 15-4. Multi Master System

pins to the DPI pins of the master SHARC. Since these flags are

NOT open drain, slave select pins cannot be shorted together in multi

master environment. To control slave selects, an external glue logic is

required in a multi-master environment.

Another feature is implemented to troubleshoot the bus mastership proto-

col. If a recent SHARC bus master receives an invalidly asserted

signal, it triggers an error handling scenario using the

for DMA) and

into an ISR. This ensures that any potential driver conflict is solved.

more information, see "Control Registers (SPICTL, SPICTLB)" on

Operating Modes

This sections describes the different mechanisms used for master or slave

select operation modes.

www.BDTIC.com/ADI

BUS ARBITRATION LOGIC

bit to reconfigure the SPI to slave mode, and jump

ADSP-214xx SHARC Processor Hardware Reference

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