Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 702

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Interrupts
This sequence applies only to the first time the RTC supply (bat-
tery or I/O) is connected. Once the
value is retained as long as RTC supply (battery or I/O) is valid.
3. After the RTC supply is connected for the first time and the
bit has been cleared, the application is free to power-up and power
-down the core supply any number of times without loss of RTC
functionality (provided the RTC supply—battery or I/O, is valid).
Conversely, if the
remains disabled irrespective of the status of the core supply.
4. The current status of the RTC power-down is updated by hardware
into the initialization status register (
is useful when the rest of the processor wakes up from power-down
and needs to know the status of the RTC.
5. Whenever the ADSP-2147x processor core wakes up from
power-down, the values of the
RTC_SWTCH
power-up. At the first seconds' event, an arbitrary value is uploaded
into these registers. To put them in a defined state software must
write the desired value into these registers.In case the
and
RTC_ALARM
quent power-up, their values are valid throughout, but can be read
by the program only after the first seconds' event after power-up.
Event Flags
The unknown values in the registers at power up can cause event
flags to set before the correct value is written into each of the regis-
ters. By catching the 1 Hz clock edge, the write to
occur a full second before the write to
an extra second of delay between the validity of
RTC_ALARM
18-14
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bit has been set, then the RTC oscillator
RTCPDN
registers is zero until the first seconds' event after
have been set before core power-down and subse-
, if the value of the
ADSP-214xx SHARC Processor Hardware Reference
bit is set or reset, its
RTCPDN
RTC_INITSTAT
,
RTC_CLOCK
RTC_ALARM
. This would cause
RTC_ALARM
RTC_CLOCK
out of reset is the same as
RTC_ALARM
RTCPDN
) register. This
and
RTC_CLOCK
can
RTC_CLOCK
and

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