Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 549

3. Wait for the DAI interrupt, and enable the IDP port inside the
DAI interrupt service routine.
4. Clear the DAI interrupt by reading the DAI interrupt latch regis-
ter. This procedure ensures that the IDP ports are enabled at the
correct time, avoiding issues like channel shift or swap in the
received data.
Starting A Standard DMA Transfer
To start a DMA transfer from the FIFO to memory:
1. Clear the FIFO by setting (= 1) the
IDP_CTL1
2. While the global
set the values for the DMA parameter registers that correspond to
channels 7–0.
3. Keep the clock and the frame sync input of the serial inputs and/or
the PDAP connected to low, by setting proper values in the SRU
registers.
4. Refer to
5. Route all of the required inputs to the IDP by writing to the SRU
registers
6. Enable the channel's
7. Start the DMA by setting
• The
PDAP is required).
• The global
standard DMA on the selected channel.
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
register).
IDP_DMA_EN
"Setting Miscellaneous Bits"
IDP_ENx
bit (bit 31 in
IDP_PDAP_EN
IDP_DMA_EN
bit (bit 31 in the
IDP_FFCLR
and the bits are cleared (= 0),
IDP_EN
above.
and bit settings.
IDP_DMA_ENx
IDP_PP_CTL
bit of the
IDP_CTL0
Input Data Port
register if the
register to enable
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