Debug Mode ..................................................................... 6-52
Single Step Mode .............................................................. 6-53
IIR Accelerator ............................................................................ 6-55
Features ................................................................................. 6-55
Register Overview ................................................................. 6-55
Clocking ............................................................................... 6-56
Data Memory ................................................................... 6-60
Operating Modes ................................................................... 6-61
Data Transfers ....................................................................... 6-62
DMA Access ..................................................................... 6-62
Interrupts .............................................................................. 6-64
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
Contents
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