Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 909

FIR MAC Status Register (FIRMACSTAT)
This register, shown in
the status of MAC operations. The status of all four multipliers/adders are
available separately for programs to poll. In fixed-point mode only the
bits are used (all other bits are reserved).
ARIx
31 30
FIR_MACAINV3
FIR_MACARI3
FIR_MACARZ3
FIR_MACMINV3
15 14
FIR_MACARZ2
FIR_MACMINV2
FIR_MACMRI2
FIR_MACMRZ2
FIR_MACAINV1
FIR_MACARI1
FIR_MACARZ1
FIR_MACMINV1
Figure A-37. FIRMACSTAT Register
Table A-49. FIRMACSTAT Register Bit Descriptions (RO)
Bits Name
0 FIR_MACMRZ0
1 FIR_MACMRI0
2 FIR_MACMINV0
3 FIR_MACARZ0
4 FIR_MACARI0
5 FIR_MACAINV0
ADSP-214xx SHARC Processor Hardware Reference
www.BDTIC.com/ADI
Figure A-37
29 28 27 26 25 24 23 22
13 12 11 10 9 8 7 6
Description
Multiplier Result Zero. Set if multiplier 0 results is zero.
Multiplier Result Infinity. Set if multiplier 0 results is infinity.
Multiply Invalid. Set if multiplier 0 multiply operation is
invalid.
Adder Result Zero. Set if a adder 0 results is zero.
Adder Result Infinity. Set if adder 0 results is infinity. Indi-
cates overflow in fixed-point mode.
Addition Invalid. Set if a adder 0 addition is invalid.
Registers Reference
and described in Table
21 20 19 18 17 16
FIR_MACARI2
FIR_MACAINV2
FIR_MACMRZ3
FIR_MACMRI3
5 4 3 2 1 0
FIR_MACMRZ0
FIR_MACMRI0
FIR_MACMINV0
FIR_MACARZ0
FIR_MACARI0
FIR_MACAINV0
FIR_MACMRZ1
FIR_MACMRI1
A-49, provides
A-83