Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 587

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detected, the

again within 4096 frames, the

The last two words of the sync code, 0xF872 and 0x4E1F, are called the

preamble-A and preamble-B of the burst preamble. Preamble-C of the

burst preamble contains burst information and is captured and stored by

the receiver. Preamble-D of the burst preamble contains the length code

and is captured by the receiver. Even if the validity bit or bit 1 of byte 0

has been set, the receiver still looks for the sync code in order to record the

preamble-C and D values. Once the sync code has not been detected in

4096 frames, the preamble-C and D registers are set to zero.

The S/PDIF receiver in 2147x and 2148x, supports all DTS frame

sizes of 256, 512, 1024, 2048 and 4096. To enable support for

2048 and 4096 DTS frame sizes, DTS_CD_4K_EN bit in

DIRCTL, need to be set. In 2146x on-chip S/PDIF receiver sup-

ports 256, 512 and 1024 DTS frames only. The DTS test kit

frames with 2048 and 4096 frame sizes can be detected by adding

the sync detection logic in software by using a software counter to

check for the DTS header every 2048 and 4096 frames

respectively.

Emphasized Audio Data

The receiver must indicate to the program whether the received audio data

is emphasized using the channel status bits as detailed below.

• In professional mode, (bit 0 of byte 0 = 1), channel status bits 2–4

of byte 0 indicate the audio data is emphasized if they are equal to

• In consumer mode, (bit 0 of byte 0 = 0), channel status bits 3–5

indicate the audio data is emphasized if they are equal to 100, 010

If emphasis is indicated in the channel status bits, the receiver asserts the

bit flag. This bit flag is used to generate an interrupt.

ADSP-214xx SHARC Processor Hardware Reference

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bit flag is set. If the sync code is not detected

bit flag is deasserted.

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