Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 830

System and Power Management Registers
Table A-1. Bit Type Usage (Cont'd)
Bit Type
WO
WOC
W1C

Many registers have reserved bits. When writing to a register, pro-
grams may only clear (write zero to) the register's reserved bits.
System and Power Management
Registers
The registers described in the following sections are used to control system
wide operations and power management.
System Control Register (SYSCTL)
The register configures memory use, interrupts, and many aspects
SYSCTL
of pin multiplexing.
page 23-28.) Bit descriptions for this register are shown in
described in Table
A-4
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Description
Write-Only
Write-Only-to-Clear
Write-1-to-Clear
(For more information, see "Pin Multiplexing" on
A-2.
ADSP-214xx SHARC Processor Hardware Reference
Usage
WO bits are used primarily in control/status register
to trigger events like self-refresh or power-up
sequence for SDRAM. Note that these bit type
always read zero
WOC bits are used primarily in control/status regis-
ter to flush data FIFOs and to clear its status bits.
W1C bits are sticky bits used primarily in status
registers during interrupt acknowledge for PWM
and timers. These bits are sticky and their status is
only cleared after a write.
Figure A-1 and