Analog Devices SHARC ADSP-214 Series Hardware Reference Manual page 554

Features
Table 12-1. SRC Specifications (Cont'd)
Feature
Access Type
Data Buffer
Core Data Access
DMA Data Access
DMA Channels
DMA Chaining
Boot Capable
Local Memory
Clock Operation
Features
The SRC for the SHARC processors has the features shown in the list
below.
• 4 sample rate converters
• Automatically senses sample frequencies
• Simple programming required
• Attenuates sample clock jitter
• Supports left-justified, I
and TDM serial port (daisy chain) modes
• Accepts 16-/18-/20-/24-bit data
• Up to 192 kHz sample rate input/output sample ratios from 7.75:1
to 1:8
12-2
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Availability
No
N/A
N/A
N/A
N/A
N/A
Yes (RAM, ROM)
f /4
PCLK
2
S, right-justified (16-,18-, 20-, 24-bits),
ADSP-214xx SHARC Processor Hardware Reference